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PMOS TRANSISTOR PYCELL WITH ROW STACKING
 
PyCell Description:
This PyCell creates a PMOS transistor with many options for automated and manual layout. Users may specify the number of rows, interdigitation, dummies and guard rings. Additional parameters are available for modifying contact-to-gate spacing and contact coverage over diffusion. This PyCell automatically creates all user-specified connectivity for between fingers and rows. Each finger is treated as an object that is connected by passing a numeric sequence as a method to do the actual wiring. The connectivity, spacing and contacts conform to the design rules for the process in use.
 
Pycell Plot
 
Pycell Parameters
 
Result of different parameter values
  
 
Two rows with Guard ring   One row with Dummies
   
 
Process Technology:
The PyCell layouts above were generated for a generic 130nm process. This same PyCell source code has been tested to create design rule correct layout for both minimum spacing rules and recommended rules for foundry 65nm and 90nm processes, and for minimum spacing rules at 130nm, 180nm and 250nm.
 
Source Code:
PyCell name: Pmos1
Source name: Mosfet1.py